Synopsis announced the launch of PrimeTime Technology – a static time analysis tool to address everyday challenges of power closure and timing for FinFET designs. With the help of the new PrimeTime technology, users can improve the power reduction and turnaround time, ensuring smart utilization of their compute resources.
With the passage of time, the competition for chip designers has increased drastically. This new release will allow them to easily meet tight signoff schedules. While talking about PrimeTime, Synopsis’ Senior Director – Marketing, Robert Hoogenstryd, said that timing closure challenges for designers are likely to increase in the future. The new PrimeTime technology can help them deal with these rising challenges. He further added that the 2015.12 release of PrimeTime will keep all the customers of Synopsis well ahead of the curve by reducing turnaround time without updating the existing hardware.
Traditional System-on-chip designers have to face timing related issues, such as finding high-quality compute resources and reducing runtime. To get rid of these issues, the new PrimeTime follows three approaches for faster and smarter timing closures: first, accelerated performance with a 10x boost in reporting function and 2x in overall runtime. Second, improved scaling across more than 16 cores, and third is a tighter correlation of GBA (graph-based analysis) to PBA (path-based analysis).